Switches, Gates and Circuits

Gates for a switch (and vice versa!)

Representation of data via switching

Our discussion of data representation in the last chapter has indicated that the simple symbols 0 and 1 can be used to represent a host of data: unsigned integers, signed integers, floating point numbers, typed alphabetic characters, computer instructions and even sounds and images.

It seems that we are saying that the computer is a device which has a special facility for manipulating lots of zeroes and ones. We have reminded ourselves, though, that computers do not really contain a myriad dance of zeroes and ones; instead, computers are filled with millions and millions of switches which are constantly being turned on and off in specific patterns, following some algorithm. The values 0/1 are then physically represented in the computer by the off/on position of the switches.

Switching Relays

Model:

Relay switches are built in two general ways:

1. Normally open Spring holds switch open Magnet closes switch
2. Normally closed Spring holds switch closed Magnet opens switch

We can summarize the way these switches work by writing the following output tables:

                Normally open             Normally closed

          Input:   off   on                 off     on
                -------------     	      ---------------
control:  off   |  off   off        off  |  off     on
control:  on    |  off   on         on   |  off     off

Transistors - "Solid state switches"

A switch with no moving parts:

Input is called "collector"
Output is called "emitter"
Control is called "base"

Transistors are also built in the "normally open" and "normally closed" varieties.

Logic through switching

If we use the common symbol 0 for "off" and 1 for "on" note that the output tables below correspond to the two different types of relay switches discussed above.


            Normally open          Normally closed

                Input                  Input
               0     1                0     1
            -----------     	      -----------
control 0   |  0     0        	0   |  0     1
control 1   |  0     1        	1   |  0     0

If we allow the "off" and "on" switches to represent the logic values "false" and "true" then it is also possible to use these simple switches to build LOGIC CIRCUITS.


            Normally open          Normally closed

                Input                  Input
               F     T                F     T
            -----------     	      -----------
control F   |  F     F        	F   |  F     T
control t   |  F     T        	T   |  F     F

Before we go further with logic circuits, let's get familiar with using notation of FORMAL LOGIC

PQ means P AND Q -- true only when both P and Q are true
P+Q means P OR Q -- true is long as either or both P and Q are true
P' means NOT P -- the opposite of P

A "logic table" is constructed by considering all of the possible states that the logic variables could have. For a logic problem with n-variables there will be 2ⁿ rows in the logic table. For example, a simple two-variable problem will have 4 rows:

   P   Q
  --- ---
   T   T
   T   F
   F   T
   F   F

while a three-variable problem will have 8 rows:

   P   Q   R
  --- --- ---
   T   T   T
   T   F   T
   F   T   T
   F   F   T
   T   T   F
   T   F   F
   F   T   F
   F   F   F

Note that even with a simple two-variable problem, there are MANY possible outcomes of the logical combinations. In fact, there are 2^2ⁿ possible output states:

                Possible outputs

   P   Q    |   1   2   3   4   5   6   7   8   9  10  11  12  13  14  15  16
  --- ---   |  ---------------------------------------------------------------
   T   T    |   T   T   T   T   F   T   T   F   T   F   F   T   F   F   F   F
   T   F    |   T   T   T   F   T   T   F   T   F   T   F   F   T   F   F   F
   F   T    |   T   T   F   T   T   F   T   T   F   F   T   F   F   T   F   F
   F   F    |   T   F   T   T   T   F   F   F   T   T   T   F   F   F   T   F

Note that with 2 input variables (4 input states), we have 2⁴=16 possible output combinations. With 3 inputs to our logic equation there are 256 possible output combinations. With only 4 inputs, there are 65,536 possible output combinations and with 8 inputs there are more than 10⁷⁷ possible combinations! (Extra credit -- write them all out... only kidding)

With a two-valued logic problem, we have names for the various output combinations. For example, the 2nd output column above corresponds to the logical operation called OR (true as long as one or both of the variables are true); the 12th column is the logical operation AND (true only when both of the variables are true). Some of these outputs are less familiar. For example, the 5th column is called NAND (false only when both inputs are true); the 8th column is called XOR (true when one but not both of the inputs are true).

Bold assertion

ANY OF THE POSSIBLE OUTPUT COMBINATIONS can be simulated by combining AND, OR and NOT operations.

Proof by construction

Look at the desired result and find the locations where a True is desired
For each row of the table with a true as its result, select either PQ, PQ', P'Q or P'Q' such that the result would yield true.
Combine all of the results from step b) with OR operations. Done! (Note: It's likely that a more elegant solution may exist but this is correct)

Note that this works for 3-valued, 4-valued, or n-valued logic systems; it may not be elegant but it's general!

Example

How can we construct the XOR outcome using a combination of AND, OR and NOT?

Solution

a. The XOR table look like this:


   P   Q    |   P XOR Q
  --- ---   |  ---------
   T   T    |      F
   T   F    |      T      <--- this row is needed
   F   T    |      T      <--- this row is needed
   F   F    |      F

Note that there are two rows with True as their result. The row with P = True, Q = False and the row with P = False, Q = True.

b. First result: P = True, Q = False.

What combination of these P, Q values would lead to True?

PQ = False
PQ' = True
P'Q = False
P'Q' = False

Second result: P = False, Q = True.

What combination of these P, Q values would lead to True?

PQ = False
PQ' = False
P'Q = True
P'Q' = False

Thus we find that the first result comes from PQ' while the second result comes from P'Q.

c. Combining the results in b we have, XOR(P,Q) = PQ' + P'Q

Back to switches!

Our transistor switches can be built into "gates" which perform the basic operations AND and NOT.

INVERTER (NOT gate)

Use a normally CLOSED transistor, with current always on to the collector, then connect the base (control current) to a wire which is turned on with P is True and off when P is False. The output corresponds to P':

Normally closed transistor
Collector, always on
Base, connected to P
Emitter output, P'

Note that the current is always on as long as P is off, but when P is on the current stops. If we use the symbolism "on means 1; off means 0" then this is the NOT operation, the P' gate.

AND gate

In this case, we begin with a normally open transistor, the collector will be connected to a wire which represents the value of P, the base is connected to a wire which represents the value of Q. The output corresponds to PQ, thus this is the AND gate.

Normally open transistor
Collector, connected to P
Base, connected to Q
Emitter output, PQ

OR gate

Theorem

P+Q = (P'Q')'

Proof by logic tables

a. Construct the logic table for P, Q, and P+Q.
b. Construct the logic table for P, Q, (P'Q')'
c. Demonstrate the the outputs are exactly the same.

   P   Q    |   P + Q
  --- ---   |  -------
   T   T    |     T
   T   F    |     T   
   F   T    |     T     
   F   F    |     F



   P   Q    |   P'   Q'    P'Q'    (P'Q')'
  --- ---   |  ---- ----  ------   -------
   T   T    |    F   F      F         T
   T   F    |    F   T      F         T
   F   T    |    T   F      F         T
   F   F    |    T   T      T         F

By inspection of the columns P + Q and (P'Q')' we see that these are equivalent.

So an OR gate would use 4 transistors instead of 1, three normally closed transistors (NOT gates), one normally open (AND gate).

Note that this drawing is quite complicated even though it symbolizes as fairly simple idea. It would be better to have a symbolism which is less "opaque" to meaning. Consequently, computer designs use the following symbols to represent the three fundamental gates:

NOT gate AND gate OR gate

In this way, we can redraw the earlier diagram for the OR-gate as:

So, if we accept that all possible combinations of logic outcomes are realized by AND, OR and NOT then it's possible to assert that all such outcomes could be simulated by transistor-based gates. As an example, we discovered earlier,

XOR(P,Q) = PQ' + P'Q

How would we wire this as a gate built from transistors?

1. Build each of the inputs, using NOT gates as needed, then connect the inputs with AND gates
Repeat for each component of the "equation"
2. Connect all of the results with OR gates

So for this example, We need, P, Q, P' and Q', and then we'll assemble them with AND gates. For example, PQ' is

which can be written in "shorthand" as

which, when combined with a similar set of components for PQ' and an OR gate leads to the final solution,

Note that this circuit requires 8 transistors.

Homework

1. Consider the circuit:

a. How many transistors would be required to build this circuit?
b. What is the logic statement which corresponds directly to this circuit?
c. Write the the logic table (truth table) for this circuit.
d. Draw an "equivalent" circuit which is simpler (i.e. the circuit must have the same
outputs for the same inputs using fewer gates).

2. Using logic tables, prove that (PQ)' = P' + Q'

3. The NAND gate is an AND gate with an inverter connected to its output; that is, if the inputs are called P and Q, then the output is (PQ)'. NAND gates are usually written in circuit drawings as:

Write the logic table for the NAND gate.

4. The NAND gate is a "universal" gate in that all other gates can be built from this gate.

a. If one input of a NAND gate is connected directly to power (always 1) and the other
input is connected to a wire representing the value of P, what is the output? What is this
gate called?
b. Show how two NAND gates can be connected together so that inputs P and Q will
result in the output PQ.
c. Show how three NAN gates can be connected together so that the inputs P and Q will
result in the output P+Q. Hint: remember from lecture that P+Q = (P'Q')'

5. Textbook homework problems, page 266: 2, 3, 4, 5, 6a.