Basic Circuits

Creating an binary adder:

For 1-bit binary addition, there are four possible problems to solve:

0 + 0 = 0, carry 0
0 + 1 = 1, carry 0
1 + 0 = 1, carry 0
1 + 1 = 0, carry 1

Consider the logic table for this problem:

X Y Sum Carry

0 0
0
0

0 1
1
0

1 0
1
0

1 1
0
1

Thus, the sum circuit is our familiar XOR gate:

While the carry circuit is the AND gate. Combining them, we have a new circuit called the half-adder,

which can be represented schematically as,

This circuit is called a "half" adder because it has part of the functionality of addition, sum and carry out, but it lacks the ability to "carry in" a value from the previous bit of addition. It is possible, though, to combine two half adders to provide this functionality as follows:

This circuit is referred to as a full-adder. Note by examples, that all eight possible cases yield the correct result from our design:

C_IN	X	Y	SUM	C_OUT
0	0	0	0	0
0	0	1	1	0
0	1	0	1	0
0	1	1	0	1
1	0	0	1	0
1	0	1	0	1
1	1	0	0	1
1	1	1	1	1

The full adder, if completely drawn at the primitive gate level, would be seen to contain 22 transistors. This would create a somewhat complicated drawing for a simple device thus, as with the half-adder, it might be convenient to represent this circuit in a block diagram,

Of course, even our limited PIPPIN machine supports addition with more than a 1-bit result. It is possible to combine full adders with one another to allow larger results to be obtained. For example, to perform PIPPIN addition we would chain eight full adders together,

If we wanted to make the picture more complicated we could add additional full adders until we have the full 32-bits used by most current computer systems. It's not in any way different, though, than the PIPPIN adder, just more transistors. Note also that since the PIPPIN machine uses 2's-complement representation, it is possible to check the validity of the result from an addition. Recall that 2's-complement addition is correct if the carry in and carry out from the last bit match. We could include another output bit from our circuit called an error flag. This bit would be 1 if the value is not valid, in other words if the carry in and carry out from the last bit do not match:

Carry_in	Carry_out	Error
0	0	0
0	1	1
1	0	1
1	1	0

Note that this is the familiar XOR gate, leading to our final circuit for an 8-bit adder (which includes the commonly used symbol for the XOR gate),